Established silicon PUFs such as SRAM, arbiter, or ring-oscillator PUFs efficiently generate unique patterns for cryptographic key generation [1]. As digital circuits, they provide a high compatibility with common EDA tools and adding placement constraints also facilitates balanced designs. First-order compensation mechanisms, such as balanced paths or differential evaluation of structures, can be implemented to address linear global effects. 

In analog circuit design, however, manufacturing variations between circuit components that are intended to be exactly equal are highly yield-relevant. These variations are a superposition of systematic global process variations caused, e.g., by gradients in doping concentration and statistical random local variations, commonly referred to as mismatch. Both effects are typically well characterized by the foundries and can be accounted for in statistical analog simulations. We are working on a PUF primitive exploiting the mismatch of resistors with identical nominal values. 

This work considers fingerprinting of Hall sensors, which usually do not support cryptographic authentication. This low-cost solution providing fingerprints with a few bits helps against accidental or intended swapping of sensors and increases the effort to fake a sensor. Integrated Hall sensors typically provide a weak analog signal affected by process fluctuations, temperature drift, packaging stress, offset voltage, and 1/f-noise caused by inhomogeneities in the doping concentration and asymmetries in the geometry [2]. Many commercial Hall sensors use the spinning current cancellation technique to eliminate these effects, as depicted in Fig. 1. Similarly, the fingerprint from the Hall sensors is obtained by exploiting the offset and compensating for the magnetic field.