CMOS A/D Converter Design

Lab CMOS A/D Converter Design

Vortragende/r (Mitwirkende/r)	Tobias Chlan Vartika Verma
Nummer	0000000957
Art	Praktikum
Umfang	5 SWS
Semester	Wintersemester 2023/24
Unterrichtssprache	Englisch
Stellung in Studienplänen	Siehe TUMonline
Termine	Siehe TUMonline

18.10.2023 15:30-17:00 N5325, Seminarraum, Participation in the kick-off date is mandatory for participation in the Lab. If more than 20 people are present, the places will be allocated according to the time of registration in TUMonline.

Teilnahmekriterien

Lernziele

Upon successful completion of the lab the students are able to design and verify transistor level integrated analog circuits and small systems using a circuit design software according to a given specification

Beschreibung

During this lab an A/D-converter will be designed. First, the archtitecture (Delta-Sigma ADC) will be investigated. Second, a conceptional model will be designed using Simulink/Matlab. Finally, the concept will be realized with the software Cadence/Virtuoso by considering non-idealities and performance limitations.

Inhaltliche Voraussetzungen

Solid-State and Semiconductor Device Physics, Analog and Mixed-Signal Electronics

Empfohlene Literatur

Working instructions and computer + software (Cadence Design environment) will be provided