Lab CMOS A/D Converter Design
| Lecturer (assistant) | |
|---|---|
| Number | 0000000957 |
| Type | Practical course |
| Duration | 5 SWS |
| Term | Wintersemester 2023/24 |
| Language of instruction | English |
| Position within curricula | See TUMonline |
| Dates | See TUMonline |
Admission information
Objectives
Based on the theory learned from the ADC course and the knowledge from the prior basic lab, a simple 2nd order continuous-time sigma delta ADC will be build. The functionality and performance of the system will first be verified using Simulink and the circuit will then be designed using Cadence Virtuoso.
Description
The module is examined in form of a lab performance with the following components:
• The performance of the circuits designed during the lab according to the given specification is evaluated.
• The design, its performance and presentation is presented in a 10 minutes talk (5 mins. each group member).
• The students will write a documentation of their design and its performance. This group report (10 - 15 pages).
Prerequisites
Solid-State and Semiconductor Device Physics, Analog and Mixed-Signal Electronics, CMOS Analog-to-Digital Converters.
*Students who have taken the ADC course in summer semester will be given preference.
Examination
The module is examined in form of a lab performance with the following components:
• The performance of the circuits designed during the lab according to the given specification is evaluated.
• The design, its performance and presentation is presented in a 10 minutes talk (5 mins. each group member).
• The students will write a documentation of their design and its performance. This group report (10 - 15 pages).
Recommended literature
Working instructions and computer + software (Cadence Design environment) will be provided